Non-volatile memory devices formed on bulk silicon semiconductor substrates are well known. For example, U.S. Pat. Nos. 6,747,310, 7,868,375 and 7,927,994 disclose memory cells with four gates (floating gate, control gate, select gate and erase gate) formed on a bulk semiconductor substrate. Source and drain regions are formed as diffusion implant regions into the substrate, defining a channel region therebetween in the substrate. The floating gate is disposed over and controls a first portion of the channel region, the select gate is disposed over and controls a second portion of the channel region, the control gate is disposed over the floating gate, and the erase gate is disposed over the source region. Bulk substrates are ideal for these type of memory devices because deep diffusions into the substrate can be used for forming the source and drain region junctions. These three patents are incorporated herein by reference for all purposes.
Silicon on insulator (SOI) devices are well known in the art of microelectronics. SOI devices differ from bulk silicon substrate devices in that the substrate is layered with an embedded insulating layer under the silicon surface (i.e. silicon-insulator-silicon) instead of being solid silicon. With SOI devices, the silicon junctions are formed in a thin silicon layer disposed over the electrical insulator that is embedded in the silicon substrate. The insulator is typically silicon dioxide (oxide). This substrate configuration reduces parasitic device capacitance, thereby improving performance. SOI substrates can be manufactured by SIMOX (separation by implantation of oxygen using an oxygen ion beam implantation—see U.S. Pat. Nos. 5,888,297 and 5,061,642), wafer bonding (bonding oxidized silicon with a second substrate and removing most of the second substrate—see U.S. Pat. No. 4,771,016), or seeding (topmost silicon layer grown directly on the insulator—see U.S. Pat. No. 5,417,180). These four patents are incorporated herein by reference for all purposes.
It is known to form core logic devices such as high voltage, input/output and/or analog devices on the same substrate as non-volatile memory devices (i.e. typically referred to as embedded memory devices). As device geometries continue to shrink, these core logic devices could benefit greatly from the advantages of SOI substrates. However, the non-volatile memory devices are not conducive to SOI substrates. There is a need to combine the advantages of core logic devices formed on an SOI substrate with memory devices formed on bulk substrates.